|
#1
|
Accepted
|
33ms |
26.242 MiB |
|
#2
|
Accepted
|
32ms |
26.242 MiB |
|
#3
|
Accepted
|
33ms |
26.242 MiB |
|
#4
|
Accepted
|
32ms |
26.242 MiB |
|
#5
|
Wrong Answer
On line 1: Read 3, expect 2.
|
33ms |
26.242 MiB |
|
#6
|
Accepted
|
20ms |
26.242 MiB |
|
#7
|
Accepted
|
31ms |
26.242 MiB |
|
#8
|
Accepted
|
31ms |
26.23 MiB |
|
#9
|
Accepted
|
31ms |
26.258 MiB |
|
#10
|
Wrong Answer
On line 1: Read 8, expect 2.
|
31ms |
26.242 MiB |
|
#11
|
Accepted
|
33ms |
26.242 MiB |
|
#12
|
Wrong Answer
On line 1: Read 10, expect 2.
|
32ms |
26.332 MiB |
|
#13
|
Wrong Answer
On line 1: Read 20, expect 4.
|
32ms |
26.242 MiB |
|
#14
|
Wrong Answer
On line 1: Read 2, expect 1.
|
31ms |
26.242 MiB |
|
#15
|
Wrong Answer
On line 1: Read 10, expect 6.
|
32ms |
26.242 MiB |
|
#16
|
Wrong Answer
On line 1: Read 10, expect 7.
|
31ms |
26.328 MiB |
|
#17
|
Accepted
|
31ms |
26.59 MiB |
|
#18
|
Accepted
|
31ms |
26.422 MiB |
|
#19
|
Wrong Answer
On line 1: Read 20, expect 16.
|
31ms |
26.262 MiB |
|
#20
|
Wrong Answer
On line 1: Read 7, expect 4.
|
30ms |
26.242 MiB |
rr26 LV 4
undefined
rr26
LV 4
undefined